wideband, ring demodulator sd8901 features high frequency operation wide dynamic range low capacitance applications communications rf mixers description the sd8901 is a ring demodulator/balanced mixer. designed to utilize calogics ultra high speed and low capacitance lateral dmos process. the sd8901 offers significant performance improvements over jfet and diode balanced mixers when low third order harmonic distortion has been a problem. package information part package temperature range sd8901hd hermetic to-78 -55 o c to 125 o c sd8901cy plastic surface mount -55 o c to 125 o c XSD8901 sorted chips in carriers -55 o c to 125 o c llc functional block diagram so-14 top view 1 lo 2 if 2 lo nc sub sub sub nc sub sub sub 1 rf 2 rf 1 if pin configurations lo 1 lo 2 if 2 rf 2 rf 1 if 1 substrate 5 7 3 6 2 1 4 c to-78 lo rf lo rf if if 1 2 2 1 1 2 1 2 3 4 5 bottom view 1 2 3 4 5 6 7 7 6 if rf rf case lo lo if 1 2 1 1 2 2 cd4
sd8901 llc absolute maximum ratings (t a = +25 o c unless otherwise noted) v ds drain to source . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 v v db drain to substrate . . . . . . . . . . . . . . . . . . . . . . . . 22.5 v v sb source to substrate . . . . . . . . . . . . . . . . . . . . . . . 22.5 v v gs gate to source. . . . . . . . . . . . . . . . . . . . -22.5 v to 30 v v gb gate to substrate. . . . . . . . . . . . . . . . . . . . -0.3v to 30 v v gd gate to drain . . . . . . . . . . . . . . . . . . . . . . -22.5v to 30 v i d drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 ma operating temperature . . . . . . . . . . . . . . . . . . . . -55 to 125 o c storage temperature . . . . . . . . . . . . . . . . . . . . . . -65 to 150 o c power dissipation (a package)* . . . . . . . . . . . . . . . . 640 mw * derate 5 mw/ o c above 25 o c electrical characteristcis (t a = +25 o c unless otherwise noted) symbol characteristics min typ max unit test conditions static v (br)ds drain-source breakdown voltage 15 25 v v gs = v sb = -5 v is = 10 na v (br)sd source-drain breakdown voltage 15 v gd = v db = - 5 v i d = 10 na v (br)db drain-substrate breakdown voltage 22.5 source open v gb = 0 v, i d = 10 na v (br)sb source-substrate breakdown voltage 22.5 drain open v gb = 0 v, i d = 10 na v t threshold voltage 0.1 1 2.0 v ds = v gs = v t i s = 1 m a, v sb = 0v r ds(on) drain-source "on" resistance 50 75 w i d = 1 ma v sb = 0 v v gs = 5 v 30 v gs = 10 v 23 v gs = 15 v 19 v gs = 20 v d r ds(on) resistance matching 3 7 v gs = 5 v dynamic c gg lo 1 - lo 2 capacitance 4.4 pf v ds = 0 v, v bs = -5.5 v v gs = 4 v l c conversion loss 8 db see figure 1, plo = +17 dbm imd 3 third order intercept +35 f max maximum operation frequency 250 mhz note: guaranteed by design, not subject to production test performance comparison 3rd order input intercept point (+dbm) 40 30 20 10 0 0 5 10 15 20 25 30 35 power local osc. (+dbm) u350 diode ring sd8901
sd8901 llc figure 2. first and third quadrand i-e characteristic showing effect of gate voltage leading to large-signal overload distortion. figure 1. signal t4-1 +v gg t4-1 l o 680 pf -vu t1-1t or t4-1 i-f u low-pass image terminating filter (optional) 680 pf sd8901 u u u id (ma) 50.00 10.00 /div -50.00 -5.000 vds 0 (v) 5.000 0 1.000/div 16 v 12 v 8 v 4 v 0 v
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